Silicon wafer for epitaxial growth, epitaxial wafer, and its manufacturing method

ABSTRACT

There are disclosed a silicon wafer for epitaxial growth wherein the wafer is produced by slicing a silicon single crystal grown with doping nitrogen according to the Czochralski method (CZ method) in the region where at least the center of the wafer becomes V region in which the void type defects are generated, and wherein the number of defects having an opening size of 20 nm or less among the void type defects appearing on the surface of the wafer is 0.02/cm 2  or less, and an epitalial wafer wherein an epitaxial layer is formed on the silicon wafer for epitaxial growth. Thereby, there can be produced an epitaxial wafer having a high gettering capability wherein very few SF exist in the epitaxial layer easily at high productivity and at low cost.

TECHNICAL FIELD

The present invention relates to an epitaxial wafer (hereinafteroccasionally referred to as just “epi-wafer”) which is excellent ingettering capability to capture a harmful heavy metal impurity, and hasfew crystal defects existing in an epitaxial layer and is excellent incrystallinity, and a silicon wafer for epitaxial growth for producingit, and a method of producing it.

BACKGROUND ART

The epitaxial silicon wafer has been widely used for many years as awafer for producing an individual semiconductor, a bipolar IC, or thelike because of the outstanding characteristics thereof. Moreover, sincea soft error and a latch-up quality thereof are excellent also as forMOS LSI, it has been widely used for a microprocessor unit or a flashmemory device. Furthermore, the need of epi-wafer has been expandedincreasingly in order to reduce lowering of reliability of DRAM due to aso-called grown-in defect introduced at the time of production of asilicon single crystal.

If a heavy metal impurity exists in the epi-wafer used for such asemiconductor device, it will become a cause of poor characteristics ofthe semiconductor device. Cleanliness needed especially for the latestdevice is considered to be a concentration of a heavy metal impurity of1×10⁹ atoms/cm² or less, and thus the heavy metal impurity existing inepi-wafer should be decreased as much as possible.

There is a gettering technique as one of the techniques for reducingsuch a heavy metal impurity, and the importance of the getteringtechnique is becoming higher in recent years. One of the very effectivemethods as gettering technique is a method called Intrinsic gettering(IG) wherein oxygen precipitates (BMD: Bulk micro defect) are formed ina silicon wafer, and a heavy metal impurity is caught at the distortedplace. However, since the epi-wafer is generally subjected to hightemperature heat treatment in order to deposit an epitaxial layer(hereinafter occasionally referred to as just “epi-layer”) on a siliconwafer, the nuclei of oxygen precipitation which have been grown to someextent in the heat environment at the time of growing of crystal aredisappeared due to the high temperature heat treatment in the epitaxialprocess, and it may cause a problem that BMD is hard to be formed.

Then, in order to solve such a problem, it has been proposed in JapanesePatent Application Laid-open (Kokai) No. 2000-44389, that the siliconsingle crystal in which nitrogen is doped is used as a substrate onwhich an epitaxial layer is formed. If nitrogen is doped, the nucleus ofoxygen precipitation due to nitrogen (uneven nucleus) is formed in thesilicon single crystal, and the nucleus of oxygen precipitation cannotbe disappeared easily in heat treatment at the time of formation of theepi-layer, and thus the epi-wafer with high gettering capability can beproduced.

On the other hand, it-has been known that stacking faults (SF) will begenerated on an epi-layer in an epi-wafer. If a device is produced on SFgenerated in the epi-layer, leak of electric current or the like will begenerated and it will cause poor characteristics. It is known that ifimpurity exists on a substrate, the SF is formed with it as a startingpoint in the process wherein an epi-layer is being deposited. Therefore,in the case that an epi-layer is formed, the epi-layer is usually formedwith being controlled so that impurities such as a particle may notexist on a substrate.

However, it was made clear that the cause of generation of SF in anepi-layer is generated due to not only impurities such as a particle,but also grown-in defects which exist near the surface of the waferformed at the time of growth of-the silicon single crystal as a startingpoint, as indicated in Japanese Patent. Application Laid-open (Kokai)No. 2001-151596. It was also revealed that the probability is very highin the epi-wafer in which nitrogen is doped as compared with theepi-wafer in which nitrogen is not doped. In Japanese Patent ApplicationLaid-open (Kokai) No. 2001-151596, it is proposed to use as a substratethe wafer in which a grown-in defect does not exist in a surface layerin order to prevent generation of SF. Specifically, it is proposed touse as a substrate for epitaxial growth the wafer sliced from a singlecrystal produced so that grown-in defects may not be generated using thespecial manufacture condition wherein a rate of crystal growth isstrictly controlled when the crystal is grown, or the wafer subjected toannealing processing to eliminate defects in a surface layer of thewafer.

However, such methods may cause significant lowering of productivity anda remarkable cost rise in production of an epitaxial wafer, since theyuse a special method for producing a crystal, and the wafer wherein nocrystal defect exists in a surface layer of the wafer should be producedby performing annealing processing which needs special equipment andoperation cost, according to these methods.

DISCLOSURE OF THE INVENTION

The present invention has been accomplished to solve the above-mentionedproblems. An object of the present invention is to produce an epitaxialwafer with high quality wherein gettering capability is high and SFwhich have a bad influence on device characteristics are very few on anepitaxial layer at high productivity and at low cost.

In order to solve the above-mentioned problems, the present inventionprovides a silicon wafer for epitaxial growth, wherein the wafer isproduced by slicing a silicon single crystal grown with doping nitrogenaccording to the Czochralski method (CZ method) in the region where atleast the center of the wafer becomes V region in which void typedefects are generated and wherein the number of defects having anopening size of 20 nm or less among the void type defects appearing on asurface of the wafer is 0.02/cm² or less.

As described above, if it is the silicon wafer for epitaxial growthproduced by slicing a silicon single crystal grown with doping nitrogenaccording to the Czochralski method (CZ method) in the region where atleast the center of the wafer becomes V region in which void typedefects are generated wherein the number of defects having an openingsize of 20 nm or less among the void type defects appearing on thesurface of the wafer is 0.02/cm² or less, it can be a silicon wafer forepitaxial growth having a high gettering capability and generation of SFis suppressed at the time of epitaxial growth.

In this case, it is desirable that the above-mentioned V region existsin the range of 80% or more of a plane of the wafer.

The V region where a void type defect is generated preferably occupieswider region in a plane of the wafer. If the V region exists in therange of 80% or more of a plane of the wafer as described above, therecan be produced a silicon wafer wherein the number of the void typedefects having an opening size of 20 nm or less which appear on thesurface of the wafer is surely 0.02/cm² or less on the whole surface.

Moreover, it is desirable that a concentration of nitrogen doped in theabove-mentioned silicon single crystal is 1×10¹³ to 1×10¹⁴/cm³.

As described above, if a concentration of nitrogen doped in the siliconsingle crystal is 1×10¹³/cm³ or more, a nucleus of oxygen precipitationwill not disappear in a bulk part of the wafer even if epitaxial growthis performed at a high temperature, and thus there can be obtained thesilicon wafer for epitaxial growth which is the epitaxial wafer having ahigh gettering capability. Moreover, if a concentration of nitrogendoped in the silicon single crystal is 1×10¹⁴/cm³ or less, production ofa single crystal will not be prevented when the silicon single crystalis grown, and thus the silicon wafer for epitaxial growth with highquality can be obtained.

According to the present invention, there can be provided an epitaxialwafer, wherein an epitaxial layer is formed on the surface of theabove-mentioned silicon wafer for epitaxial growth of the presentinvention and the number of the stacking faults (SF) appearing on theepitaxial layer can be 0.02/cm² or less.

If it is such an epitaxial wafer of the present invention, there can beobtained an epitaxial wafer with high quality having a high getteringcapability and SF generated in an epitaxial layer are very few,especially the number of SF is 0.02/cm² or less.

Moreover, according to the present invention, there is provided a methodfor producing a silicon wafer for epitaxial growth wherein a siliconwafer for epitaxial growth is produced by growing a silicon singlecrystal with doping nitrogen according to the CZ method, withcontrolling F/G (mm²/min·K) in the range of 0.30 or more where F(mm/min) is a rate of crystal growth and G (K/mm) is a temperaturegradient near growth interface when the silicon single crystal is grown,and with controlling a passage time (min) at 1150 to 1050° C. in therange of 40 minutes or more, in the region wherein at least the centerof the wafer becomes V region in which void type defects are generated,and then slicing the grown silicon single crystal.

As described above, if the silicon wafer is produced by growing asilicon single crystal with doping nitrogen according to the CZ method,with controlling F/G (mm²/min·K) which is a ratio of a rate of crystalgrowth F and a temperature gradient G in the range of 0.30 or more, andwith controlling a passage time (min) at 1150 to 1050° C. in the rangeof 40 minutes or more, in the region wherein at least center of thewafer becomes V region, and then slicing the grown silicon singlecrystal, there can be produced a silicon wafer for epitaxial growthwherein nitrogen is doped, and the number of the defects having anopening size of 20 nm or less among the void type defects appearing onthe surface of the wafer is 0.02/cm² or less, easily without performingany special processes, and the silicon wafer for epitaxial growth whichcan produce an epitaxial wafer having a high gettering capability andgeneration of SF is suppressed at epitaxial growth can be easilyproduced at excellent productivity and at low cost.

In this case, it is desirable that the above-mentioned F/G is 0.35 ormore when the above-mentioned silicon single crystal is grown.

Since superfluous vacancies can be introduced into a silicon singlecrystal at high density and a size of a void type defect can be easilyenlarged by controlling F/G at 0.35 or more when the silicon singlecrystal is grown as described above, the number of the void type defecthaving an opening size of 20 nm or less which appears in the surface ofa silicon wafer can be certainly made 0.02/cm² or less, and thus thesilicon wafer for epitaxial growth having a better quality can beproduced.

Moreover, it is desirable that the silicon single crystal is grown sothat the above-mentioned V region may exist in the region of 80% or moreof a plane of the wafer.

Since superfluous vacancies can be easily introduced into a siliconsingle crystal by growing a silicon single crystal so that the V regionmay exist in the region of 80% or more of a plane of the wafer asdescribed above, the number of the void type defects having an openingsize of 20 nm or less which appears in the surface of the silicon wafercan be surely made 0.02/cm² or less almost all over the plane of thewafer.

Furthermore, it is desirable that a concentration of nitrogen doped inthe above-mentioned silicon single crystal is 1×10¹³ to 1×10¹⁴/cm³.

As described above, if a concentration of nitrogen doped in the siliconsingle crystal is 1×10¹³/cm³ or more, a nucleus of oxygen precipitationis certainly formed in a silicon single crystal, and thus there can beproduced a silicon wafer for epitaxial growth wherein a nucleus ofoxygen precipitation is not eliminated even if epitaxial growth at ahigh temperature is performed. Moreover, if a concentration of nitrogendoped in the silicon single crystal is 1×10¹⁴/cm³ or less, formation ofsingle crystal is not prevented when a silicon single crystal is grown.

According to the present invention, an epitaxial wafer can be producedby forming an epitaxial layer on a surface of the silicon wafer forepitaxial growth produced by the production method of the silicon waferfor epitaxial growth of the present invention.

As described above, if nitrogen is doped in the silicon wafer forepitaxial growth produced by the production method of the silicon waferfor epitaxial growth of the present invention, and the number of thedefects having an opening size of 20 nm or less among the void typedefects appearing on the surface of the wafer is 0.02/cm² or less, theepitaxial wafer with high quality wherein gettering capability is highand SF are very few in an epitaxial layer can be easily produced at ahigh productivity and at low cost by forming an epitaxial layer on thesurface of the silicon wafer for epitaxial growth.

Furthermore, according to the present invention, there is provided amethod for producing an epitaxial wafer by forming an epitaxial layer ona surface of a silicon wafer, comprising using a silicon wafer whereinthe silicon wafer is produced by slicing a silicon single crystal grownaccording to the CZ method with doping nitrogen in the region where atleast the center of the wafer becomes V region in which the void typedefects are generated and wherein the number of the defects having anopening size of 20 nm or less among the void type defects appearing on asurface of the wafer is 0.02/cm² or less.

If the epitaxial layer is formed on the surface of the silicon wafer asmentioned above, the epitaxial wafer with high quality having a highgettering capability and very few SF exist in the epitaxial layer can beeasily produced at high productivity and at low cost.

As explained above, according to the present invention, there can beeasily produced an epitaxial wafer with high quality having highgettering capability and SF generated in an epitaxial layer are very fewat high productivity and at low cost.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a view showing a distribution of F/G in a radial direction ofa crystal in Examples 1 and 2.

FIG. 2 is a view showing a passage time in each temperature range inExamples 1 and 2.

FIG. 3 is a view showing a distribution in a radial direction of acrystal of a temperature gradient G (K/mm) near a growth interface in HZused in Example 1 and Comparative Examples 1-3.

FIG. 4 is a view showing a result of observation of particles on anepitaxial layer in the epitaxial wafer of Example 2 with SP1.

FIG. 5 is a view showing a distribution of F/G in a plane in Comparativeexamples 1-3.

FIG. 6 is a view showing a result of observation of particles on anepitaxial layer in the epitaxial wafer of Comparative Examples 1 to 3with SP1.

FIG. 7 is a graph wherein the number of particles (LPD: Light PointDefect) and SF in the epitaxial wafers of Examples 1 and 2 andComparative Examples 1-3 are plotted.

FIG. 8 is a view which shows a relation between crystal defectsintroduced when a silicon single crystal is grown and F/G.

FIG. 9 is a schematic view of an apparatus for growing a single crystalused in the present invention.

FIG. 10 is an enlarged view of-a result of observation of a crosssection of a silicon wafer in which nitrogen is doped.

BEST MODE FOR CARRYING OUT THE INVENTION

The present invention will be explained below in detail, but the presentinvention is not limited thereto.

Conventionally, doping of nitrogen in a silicon wafer which serves as asubstrate for epitaxial growth has been performed in order to improve agettering capability of an epitaxial wafer. However, when the epitaxiallayer was formed on the silicon wafer in which nitrogen is doped in thisway, SF is generated in the epi-layer at high density, and there iscaused the problem of making a bad chip at the time of fabrication of adevice.

Then, the inventors of the present invention have made experiments andstudied thoroughly in order to product an epitaxial wafer whereingeneration of SF in an epi-layer is reduced even if nitrogen is doped inthe silicon wafer for epitaxial growth, and as a result, they found thatit is effective to use a silicon wafer wherein the number of the defectshaving an opening size of 20 nm or less among the void type defectsappearing on the surface of the wafer is 0.02 number/cm² or less, as asubstrate for epitaxial growth, studied various conditions forproduction of a silicon wafer, and thereby completed the presentinvention.

At first, the inventors of the present invention tried to investigate inwhich case SF is generated on the epi-wafer with grown-in defect as astart point. For it, they grow a silicon single crystal with varying asize of grown-in defect to produce various silicon wafers each havinggrown-in defect with a different size by changing a rate of crystalgrowth gradually when growing a silicon single crystal with dopingnitrogen.

Hereafter, a grown-in defect will be explained briefly. Generally, it isknown that defects have been already generated in a silicon singlecrystal grown by the CZ method at the time of growing crystal, and theyare called grown-in defect. The grown-in defects include an Interstitialtype defect and a Vacancy type defect (so-called void type defect).

It is known that generation of these defects is defined by the relationF/G which is a rate of crystal growth F (mm/min) and crystal temperaturegradient G (K/mm) near a solid-liquid interface in an axis of pullingwhen pulling a silicon single crystal by the CZ method. It is known thatVacancy will be superior (V region) as shown in FIG. 8 if the F/G islarge, on the contrary, Interstitial silicon will be superior (I region)if F/G is small.

Moreover, there is a neutral region (hereinafter referred to as Nregion) wherein there are no (few) excesses and deficiencies in atom,and it has been confirmed that there is a defect called OSF (OxidationInduced Stacking Fault) between this V region and I region by performingthermal oxidation, which is generated in a ring shape in a cross sectionperpendicular to an axis of crystal growth.

If the silicon wafer produced in I region is used as a substrate forepitaxial growth among the silicon wafers produced in each range, thereis caused a disadvantage such as generation of a lot of defects in aprojection shape on an epi-layer or the like, as disclosed in JapanesePatent Application Laid-open (Kokai) No. 2000-219598. Accordingly, it ispreferable to use the silicon wafer produced in V region as a substratefor epitaxial growth in order to prevent generation of such defects, andto improve productivity or the like. Then, in the present invention, thefollowing experiments were conducted in the case of growing the crystalin the range wherein at least center of the wafer becomes V region inwhich the void type defects are generated, when growing a silicon singlecrystal by the CZ method.

In order to investigate the relation between a void type defect and SFgenerated on the epi-wafer, the silicon single crystal was grown withchanging a rate of crystal growth gradually to vary a size of a voidtype defect, and a silicon wafer was produced, as described above.

That is, when the temperature gradient G near the crystal-growthinterface is fixed, F/G can be changed by changing a rate of crystalgrowth F. In this case, a density of superfluous vacancies introducedimmediately after crystallization of silicon can be changed by changingF/G in V region. For example, if F/G is made large in V region, adensity of superfluous vacancies introduced into a silicon singlecrystal can be made high. A void type defect is formed as a result ofaggregation of the superfluous vacancies via heating history thereafter.If heating history thereafter is the same, a void type defect getslarger with more of the superfluous vacancies, namely with larger F/G.

Then, using this behavior, the silicon single crystal wherein a size ofa void type defect was changed was grown by doping nitrogen by the CZmethod and by changing a rate of crystal growth gradually to controlF/G. After forming an epitaxial layer on each silicon wafer sliced fromthe crystal, it was evaluated by measuring a number of SF appearing onthe epi-layer. As a result, it was turned out that the number of SFgenerated on an epi-layer was significantly increased in the epi-waferproduced from the silicon wafer of which F/G was small when the crystalwas grown, i.e., a silicon wafer wherein a size of a void type defectwas small.

From the above fact, it was revealed that SF generated on an epi-layerdue to a void type defect is generated with the void type defect ofwhich size is small as a start point. Then, observation with atransmission electron microscope (TEM), computer simulation DEFGEN.X (T.Sinno and R. A. Brown, Journal of Electrochemical Society, Vol.146,pp2300 (1999)), or the like were performed, to investigate the size ofthe void type defect in which SF is generated on an epi-layer. As aresult, it has become clear that SF is generated due to the defect ofwhich opening size is 20 nm or less among the void type defectsappearing on the surface of a wafer.

In addition, in the case of computer simulation, there exist a lot ofdefects wherein two or more vacancies in a wafer are gathered. Althougha size of such defect wherein vacancies are gathered becomes several nmin some cases, it is considered that such a defect wherein severalvacancies are gathered does not form SF on an epi-layer. Therefore, thedefect of which opening size which appears in the above-mentioned wafersurface is 20 nm or less is only defects recognized as a void typedefect, which accompany a inner-wall oxide film. For example, as shownin FIG. 10, it shows those of which an opening size of the portionappearing on the surface of the wafer is 20 nm or less among the defectsin a shape of a cylinder or plate generated in the silicon wafer inwhich nitrogen is doped.

From the above results, if an epitaxial layer is formed on a siliconwafer wherein there exist almost no void type defects having an openingsize of 20 nm or less on the surface of the wafer by growing the voidtype defects, there can be produced an epitaxial wafer wherein SF havenot been generated on an epi-layer. However, there is a distribution ina size of a defect actually, and the number of the void type defects inwhich an opening size is 20 nm or less appearing on the surface of awafer never become zero also from simulation, and the several void typedefects having an opening size of 20 nm or less inevitably exist on asilicon wafer.

Therefore, the number of the void type defects of which an opening sizeis 20 nm or less among the void type defects appearing on a surface of awafer should just be 0.02 number/cm² or less, actually. The number ofsuch void type defects was defined by the quality level of an actualrealistic epi-wafer. For example, in the epitaxial wafer produced fromthe silicon wafer in which nitrogen is not doped, at least several SFare generated in a plane of the wafer. However, even if a device isfabricated on such an epi-wafer in which several SF, especially SF of0.02 number/cm² or less are generated, a device yield is not loweredextremely due to SF. Accordingly, SF in such a level can be almostdisregarded at the present device fabrication process.

Namely, if it is the silicon wafer for epitaxial growth produced byslicing a silicon single crystal grown with doping nitrogen according tothe CZ method in the region wherein at least center of the wafer becomesV region in which the void type defects are generated wherein the numberof the defects having an opening size of 20 nm or less among the voidtype defects appearing on the surface of the wafer is 0.02/cm² or less,it can be the silicon wafer for epitaxial growth having a high getteringcapability and generation of SF was suppressed at the time of epitaxialgrowth. It can be considered as the silicon wafer for epitaxial growththat high quality epitaxial wafer having high gettering capability andSF are few in the epitaxial layer can be produced.

Next, the method for producing such a silicon wafer for epitaxial growthwill be explained.

As mentioned above, in order to produce a silicon wafer for epitaxialgrowth wherein the number of the defects having an opening size of 20 nmor less among the void type defects appearing on the surface of thewafer is 0.02/cm² or less, it is necessary to control appropriately therelation F/G (mm²/min·K) of a rate of crystal growth F (mm/min) andcrystal temperature gradient G (K/mm) near a solid-liquid interface inan axis of pulling when pulling a silicon single crystal with dopingnitrogen by the CZ method.

An example of an apparatus for growing a silicon single crystalaccording to the CZ method used in the present invention is shown inFIG. 9. The apparatus for growing a silicon single crystal includes aquartz crucible 5 with which a silicon melt 4 was filled up, a graphitecrucible 6 which protects this, a heater 7 disposed around the crucibles5, 6 and insulating material 8 placed in a main chamber 1. A pullingchamber 2 for housing a grown single crystal 3 and taking out it isconnected to the upper part of this main chamber 1.

In order to grow a silicon single crystal 3 using such an apparatus forgrowing a single crystal, after a seed crystal is immersed in thesilicon melt 4 in the quartz crucible 5, it is pulled up calmly withbeing rotated to grow a cylindrical single crystal 3 via necking. On theother hand, the crucible 5, 6 can be moved up and down to a direction ofan axis of crystal growth, the crucible is raised so that a level of themelt descended by crystallization during crystal growth may becompensated, and thereby, the height of the surface of the melt is keptconstant. Moreover, inert gas such as argon gas is introduced in themain chamber 1 from the gas inlet port 10 prepared in the upper part ofthe pulling chamber 2, and passes between the single crystal 3 beingpulled and the gas flow guide cylinder 11, and then passes between thelower part of a heat insulating component 12 and a surface of a melt,and is exhausted from the gas outlet port 9.

Since a density of vacancies introduced in a single crystal is definedby the value of F/G as mentioned above when a silicon single crystal isgrown as described above, controlling F/G is one of the most importantfactors for controlling a size of the void type defect formed in asilicon single crystal. That is, if the F/G is small, density ofsuperfluous vacancies introduced in a silicon single crystal will alsobecome small, and as a result, a size of the void type defect willbecome small. Therefore, in order to enlarge a size of a void typedefect, and to grow a silicon single crystal wherein the number of thevoid type defect with a small size is reduced, it is important to grow asilicon single crystal with enlarging the value of F/G to some extent.

Then, in order to know F/G for producing the silicon wafer wherein thenumber of the defects having an opening size of 20 nm or less among thevoid type defects appearing on the surface of the wafer is 0.02/cm² orless, a suitable F/G was experimentally calculated by growing a siliconsingle crystal with varying F/G, and observing the surface of each ofthe obtained wafers. As a result, it has been revealed that if F/G is0.30 or more, superfluous vacancies can be introduced in a siliconsingle crystal at sufficient density.

In this case, it is desirable that F/G is larger in order thatsuperfluous vacancies can be introduced in a silicon single crystal athigher density. However, the upper limit of the rate of crystal growth Ffor growing up a silicon single crystal with a diameter of 200 mm ormore safely is usually 3 mm/min and the minimum value of the temperaturegradient G which enables crystallization of a silicon single crystal isabout 0.3 K/mm, and thus it is desirable that F/G is 10.00 or less atmost.

Moreover, if F/G is 0.30 or more as described above, superfluousvacancies can be introduced in a silicon single crystal at sufficientdensity. If time for aggregation of superfluous vacancies and formationof a void type defect is short, the size of the void type defect willbecome small. Therefore, it is important to set passage time at atemperature range of 1150 to 1050° C. which is considered to affect asize of a void type defect at a certain time or more, when growing asilicon single crystal. Then, as a result of investigating the suitablepassage time at 1150 to 1050° C. temperature range by the results of theexperiments and the simulation conducted this time, or the like, it hasbeen revealed that the time of 40 minutes or more is suitable.

In addition, the passage time at 1150 to 1050° C. is computed as a valuewherein a temperature range at 1150 to 1050° C. determined according toa configuration in a furnace of an apparatus for growing a singlecrystal is divided with a rate of crystal growth. The passage time at1150 to 1050° C. can be lengthened without limit if a rate of crystalgrowth F is made small, and it is preferable to be longer in thepossible range in order that the void type defect of which size is largecan be formed. However, if the productivity of a silicon single crystalis taken into consideration, or if it is in the range of a rate ofcrystal growth satisfying the condition such that F/G may be 0.30 ormore as mentioned above, the upper limit of passage time at 1150 to1050° C. is naturally restricted. When shown concretely, the lower limitof the rate of crystal growth which is materialized industrially atpresent at which a certain productivity can be secured is 0.1 mm/min,and a range of a temperature at 1150 to 1050° C. in an apparatus forproducing a single crystal is 200 mm at the longest, and thus it isdesirable that the passage time at 1150 to 1050° C. is 2000 minutes orless.

Namely, by using as a method for producing a silicon wafer for epitaxialgrowth a method of growing a silicon single crystal with doping nitrogenby the CZ method, controlling F/G (mm²/min·K) in the range of 0.30 ormore with setting a rate of crystal growth when a silicon single crystalis grown as F (mm/min) and a temperature gradient near growth interfaceas G (K/mm), and with controlling a passage time (min) at 1150 to 1050°C. in the range of 40 minutes or more, there can be easily produced athigh productivity and at low cost a silicon wafer for epitaxial growthwherein nitrogen is doped, and the number of the defects having anopening size of 20 nm or less among the void type defects appearing onthe surface of the wafer is 0.02/cm² or less, without such extraprocessing as annealing at a high temperature or the like.

In this case, by setting F/G at 0.35 or more when a silicon singlecrystal is grown, superfluous vacancies can be introduced into a siliconsingle crystal at high density, and a size of a void type defect can beenlarged easily. Therefore, it is possible to make the number of thedefects having an opening size of 20 nm or less among the void typedefects appearing on the surface of the wafer to 0.02/cm² or less surelyand to produce a silicon wafer for epitaxial growth with a betterquality.

Moreover, it is desirable that the V region where the void type defectis generated occupies wider range in a plane of a wafer, especially Vregion exists in the range of 80% or more of the plane of the wafer. Bygrowing a silicon single crystal as described above, superfluousvacancies can be easily introduced in almost all over the plane of thewafer, and thus there can be obtained a silicon wafer wherein the numberof the void type defect in which the opening size which appears in thesurface of a silicon wafer is 20 nm or less is 0.02/cm² or less inalmost all over the plane.

Moreover, it is desirable that a concentration of the nitrogen doped inthe silicon single crystal is 1×10¹³/cm³ or more when a silicon singlecrystal is grown with doping nitrogen by the CZ method. As describedabove, if a concentration of the nitrogen doped in the silicon singlecrystal is 1×10¹³/cm³ or more, a nucleus of oxygen precipitation iscertainly formed in a silicon single crystal, a nucleus of oxygenprecipitation which is formed is not eliminated even if epitaxial growthat a high temperature is performed, and thus there can be produced asilicon wafer for epitaxial growth having high gettering capability.Moreover, if a concentration of the nitrogen doped in the silicon singlecrystal is more than 1×10¹⁴/cm³, it may lead to lowering of productivityby formation of single crystal may be prevented when a silicon singlecrystal is grown. Therefore, it is preferable that a concentration ofnitrogen doped in the silicon single crystal is 1×10¹⁴/cm³ or less.

After producing the silicon wafer for epitaxial growth as mentionedabove, an epitaxial wafer can be manufactured by forming an epitaxiallayer on the surface of this silicon wafer for epitaxial growth.

Namely, an epitaxial wafer can be produced by using as a silicon wafer asilicon wafer produced by slicing a silicon single crystal grownaccording to the CZ method with doping nitrogen in the region wherein atleast center of the wafer becomes V region in which the void typedefects are generated wherein the number of the defects having anopening size of 20 nm or less among the void type defects appearing onthe surface of the wafer is 0.02/cm² or less, and forming an epitaxiallayer on the surface of the silicon wafer.

By producing an epitaxial wafer as described above, there can be easilyproduced at high productivity and at low cost an epitaxial wafer withhigh quality with high gettering capability and very few SF having a badinfluence on device characteristics exist in the epitaxial layer,especially the number of SF appearing on the surface of the epitaxiallayer is 0.02 number/cm² or less.

In addition, a method of forming an epitaxial layer on the surface of asilicon wafer is not especially limited, and the epitaxial layer can beformed by using a method which is usually performed.

Although the present invention will be explained more concretelyhereafter with referring to Examples and Comparative examples, thepresent invention is not limited thereto.

(EXAMPLE 1)

First, 320 kg of a silicon raw material was charged into a quartzcrucible having a diameter of 800 mm, and a nitrogen-doped siliconsingle crystal with a diameter of 300 mm and a body length of 120 cm wasgrown according to MCZ method with applying a horizontal magnetic fieldat a central magnetic field intensity of 4000 G, at an average rate ofcrystal growth F of 0.68 mm/min so as to grow a silicon single crystalat V region. At this time, nitrogen was doped in the silicon singlecrystal at a concentration in the range of 2×10¹³ to 9×10¹³/cm³.

As a result of investigating a distribution of temperature gradient G inHZ (hot zone) used for growing of crystal in this case in a radialdirection of the crystal, the distribution as shown in FIG. 3 wasobtained. Moreover, the distribution of F/G in the radial direction ofcrystal was as shown in FIG. 1, the value of F/G at a center part was0.30 and V region occupied in 80% or more (100%) in a radial directionat 0.30 or more. Furthermore, a passage time at 1150 to 1050° C. wasmeasured, and it was 76 minutes as shown in FIG. 2.

A wafer was sliced from the silicon single crystal produced as describedabove, and subjected to lapping, chamfering and polishing to produce asilicon wafer for epitaxial growth. The epitaxial layer with a thicknessof 4 μm was formed on this silicon wafer for epitaxial growth at 1130°C. Then, particles (with a size of 0.09 μm or more) on the surface ofthe epitaxial layer were counted by a particle counter Surfscan SP1(manufactured by KLA-Tencor corporation). As a result, 14 particles wereobserved on the 300 mmφ wafer (0.020/cm²). Furthermore, when the surfaceof the epitaxial layer was observed using a multi-laser confocal checksystem M350 (MAGICS, manufactured by Lasertech corporation), it wasshown that 8/300 mmφ wafer (0.011/cm²) were SF. As a result, it wasrevealed that there were very few SF even though nitrogen was doped, andit was a high quality epitaxial wafer.

(EXAMPLE 2)

There was prepared an apparatus for growing a single crystal which hasHZ wherein although homogeneity of a temperature gradient G in a radialdirection of a crystal was spoiled, a rate of crystal growth F can bemade higher, and as a result F/G can be made larger compared withExample 1. 320 kg of a silicon raw material was charged into a quartzcrucible having a diameter of 800 mm in the apparatus, and anitrogen-doped silicon single crystal with a diameter of 300 mm and abody length of 120 cm was grown according to MCZ method with applying ahorizontal magnetic field at a central magnetic field intensity of 3500G, at an average rate of crystal growth F of 1.10 mm/min so as to grow asilicon single crystal at V region. At this time, nitrogen was doped inthe silicon single crystal at a concentration in the range of 2×10¹³ to9×10¹³/cm³.

Moreover, the distribution of F/G in the radial direction of a crystalwas as shown in FIG. 1, the value of F/G at a center part was 0.41 and Vregion occupied in 80% or more in a radial direction at 0.35 or more.Furthermore, a passage time at 1150 to 1050° C. was measured, and it was47 minutes as shown in FIG. 2.

According to a similar method to Example 1, a silicon wafer forepitaxial growth was produced from the silicon single crystal produced,and an epitaxial layer with a thickness of 4 μm was formed on thissilicon wafer for epitaxial growth at 1130° C. Then, particles on thesurface of the epitaxial layer were counted by a particle counter SP1 asdescribed in Example 1. As a result, 3 particles were observed on the300 mmφ wafer (0.004/cm²). Furthermore, when the surface of theepitaxial layer was observed using MAGICS, it was shown that 2/300 mmφwafer (0.003/cm²) were SF. Accordingly, a higher quality epitaxial waferwherein fewer SF exist compared with Example 1 could be obtained.

(COMPARITIVE EXAMPLES 1-3)

Using the same hot zone as Example 1, 320 kg of a silicon raw materialwas charged into a quartz crucible having a diameter of 800 mm in theapparatus, and a nitrogen-doped silicon single crystal with a diameterof 300 mm and a body length of 120 cm was grown according to MCZ methodwith applying a horizontal magnetic field at a central magnetic fieldintensity of 4000 G, with gradually reducing an average rate of crystalgrowth F from 0.7 mm/min to 0.3 mm/min. At this time, nitrogen was dopedin the silicon single crystal at a concentration in the range of 2×10¹³to 9×10¹³/cm³. The distribution of G in the radial direction of acrystal was the same as Example 1.

The sample wafer was sliced from the produced silicon single crystal,and the position where OSF was generated in a single crystal wasinvestigated. Investigation of the location where OSF was generated wascarried out by performing wet oxidization at 1150° C. for 100 minutes,then performing preferential etching with mixed acid with selectivitywhich consists of fluoric acid, nitric acid, acetic acid and water, andperforming observation of the sample wafer under a condensing light witha microscope. Consequently, OSF was generated on the whole surface at aposition corresponding to a rate of growth of 0.40 mm/min.

Then, silicon wafers for epitaxial growth were produced from the partcorresponding to a rate of growth of 0.40 mm/min (Comparative example1), 0.45 mm/min (Comparative example 2), and 0.60 mm/min (Comparativeexample 3) in the similar manner to Example 1. At this time, F/G in eachposition of the silicon single crystal of the sliced wafer wasdetermined, and they were shown in FIG. 5. F/G at the center of eachwafer was respectively 0.18, 0.20 and 0.27. They do not satisfy therequirements of the present invention. Furthermore, the defects whichexist in a wafer surface of the silicon wafer for epitaxial growth ofComparative Example 1 were observed with TEM, and it was confirmed thatdefects with an opening size of 20 nm or less were easy to find, andexist quite a lot on the surface of the wafer.

Then, after an epitaxial layer with a thickness of 4 μm was formed onthis silicon wafer for epitaxial growth at 1130° C., particles on thesurface of the epitaxial layer were counted by a particle counter SP1.As a result, as shown in FIG. 6, a lot of particles were observed onevery wafer, although the number of the particles was reduced withincrease of a rate of crystal growth. On the epi-wafer of ComparativeExample 1 shown in FIG. 6, particles cannot be counted to a peripheralpart, since particles were too many to be counted with this particlecounter. On the epi-wafer of Comparative Examples 2 and 3, respectivelyparticles of 17384/300 mmφ wafer (24.6/cm²) and 33/300 mmφ wafer(0.047/cm²) were measured. Furthermore, when observation was performedusing MAGICS, SF of 18/300 mmφ wafer (0.025/cm²) were observed on theepi-wafer of Comparative Example 3, and it was revealed that it was theepi-wafer with low quality compared with those in which nitrogen was notdoped, although SF were significantly reduced compared with ComparativeExample 1 wherein a rate of crystal growth was low and those having anopening size of 20 nm or less exist at high density.

Moreover, the number of the particles and SF observed in each epitaxialwafer produced in the above-mentioned Examples 1 and 2 and ComparativeExamples 1-3 were plotted in FIG. 7 with setting F/G at the central partof the wafer as a horizontal axis. Also from FIG. 7, a high qualityepitaxial wafer wherein the number of SF generated on the epitaxiallayer is 0.02/cm² or less can be obtained by setting F/G at 0.30 ormore.

In addition the present invention is not limited to the above-describedembodiment. The above-described embodiment is a mere example, and thosehaving the substantially same structure as that described in theappended claims and providing the similar working effects are includedin the scope of the present invention.

For example, although the case where a silicon single crystal with adiameter of 300 mm was grown with impressing a magnetic field in theabove-mentioned Example, the present invention is not limited thereto, asilicon single crystal may have a diameter of 200 mm, 350 mm or a longerdiameter. Furthermore, the present invention can be applied to the casewherein a magnetic field is not impressed when a silicon single crystalis grown.

1-11. (canceled)
 12. A silicon wafer for epitaxial growth, wherein thewafer is produced by slicing a silicon single crystal grown with dopingnitrogen according to the Czochralski method (CZ method) in the regionwhere at least the center of the wafer becomes V region in which thevoid type defects are generated and wherein the number of defects havingan opening size of 20 nm or less among the void type defects appearingon a surface of the wafer is 0.02/cm² or less.
 13. The silicon wafer forepitaxial growth according to claim 12, wherein the V region exists inthe range of 80% or more of a plane of the wafer.
 14. The silicon waferfor epitaxial growth according to claim 12, wherein a concentration ofnitrogen doped in the silicon single crystal is 1×10¹³ to 1×10¹⁴/cm³.15. The silicon wafer for epitaxial growth according to claim 13,wherein a concentration of nitrogen doped in the silicon single crystalis 1×10¹³ to 1×10¹⁴/cm³.
 16. An epitaxial wafer, wherein an epitaxiallayer is formed on the surface of the silicon wafer for epitaxial growthaccording to claim
 12. 17. An epitaxial wafer, wherein an epitaxiallayer is formed on the surface of the silicon wafer for epitaxial growthaccording to claim
 13. 18. An epitaxial wafer, wherein an epitaxiallayer is formed on the surface of the silicon wafer for epitaxial growthaccording to claim
 14. 19. An epitaxial wafer, wherein an epitaxiallayer is formed on the surface of the silicon wafer for epitaxial growthaccording to claim
 15. 20. The epitaxial wafer according to claim 16,wherein the number of stacking faults (SF) appearing on the epitaxiallayer is 0.02/cm² or less.
 21. The epitaxial wafer according to claim17, wherein the number of stacking faults (SF) appearing on theepitaxial layer is 0.02/cm² or less.
 22. The epitaxial wafer accordingto claim 18, wherein the number of stacking faults (SF) appearing on theepitaxial layer is 0.02/cm² or less.
 23. The epitaxial wafer accordingto claim 19, wherein the number of stacking faults (SF) appearing on theepitaxial layer is 0.02/cm² or less.
 24. A method for producing asilicon wafer for epitaxial growth wherein a silicon wafer for epitaxialgrowth is produced by growing a silicon single crystal with dopingnitrogen according to the CZ method, with controlling F/G (mm²/min·K) inthe range of 0.30 or more where F (mm/min) is a rate of crystal growthand G (K/mm) is a temperature gradient near growth interface when thesilicon single crystal is grown, and with controlling a passage time(min) at 1150 to 1050° C. in the range of 40 minutes or more, in theregion wherein at least the center of the wafer becomes V region inwhich the void type defects are generated, and then slicing the grownsilicon single crystal.
 25. The method for producing a silicon wafer forepitaxial growth according to claim 24, wherein the F/G is 0.35 or morewhen the silicon single crystal is grown.
 26. The method for producing asilicon wafer for epitaxial growth according to claim 24, wherein thesilicon single crystal is grown so that the V region exists in theregion of 80% or more of a plane of the wafer.
 27. The method forproducing a silicon wafer for epitaxial growth according to claim 25,wherein the silicon single crystal is grown so that the V region existsin the region of 80% or more of a plane of the wafer.
 28. The method forproducing a silicon wafer for epitaxial growth according to claim 24,wherein a concentration of nitrogen doped in the silicon single crystalis 1×10¹³ to 1×10¹⁴/cm³.
 29. The method for producing a silicon waferfor epitaxial growth according to claim 25, wherein a concentration ofnitrogen doped in the silicon single crystal is 1×10¹³ to 1×10¹⁴/cm³.30. The method for producing a silicon wafer for epitaxial growthaccording to claim 26, wherein a concentration of nitrogen doped in thesilicon single crystal is 1×10¹³ to 1×10¹⁴/cm³.
 31. The method forproducing a silicon wafer for epitaxial growth according to claim 27,wherein a concentration of nitrogen doped in the silicon single crystalis 1×10¹³ to 1×10¹⁴/cm³.
 32. A method for producing an epitaxial waferby forming an epitaxial layer on a surface of the silicon wafer forepitaxial growth produced by the method according to claim
 24. 33. Amethod for producing an epitaxial wafer by forming an epitaxial layer ona surface of the silicon wafer for epitaxial growth produced by themethod according to claim
 25. 34. A method for producing an epitaxialwafer by forming an epitaxial layer on a surface of the silicon waferfor epitaxial growth produced by the method according to claim
 26. 35. Amethod for producing an epitaxial wafer by forming an epitaxial layer ona surface of the silicon wafer for epitaxial growth produced by themethod according to claim
 27. 36. A method for producing an epitaxialwafer by forming an epitaxial layer on a surface of the silicon waferfor epitaxial growth produced by the method according to claim
 28. 37. Amethod for producing an epitaxial wafer by forming an epitaxial layer ona surface of the silicon wafer for epitaxial growth produced by themethod according to claim
 29. 38. A method for producing an epitaxialwafer by forming an epitaxial layer on a surface of the silicon waferfor epitaxial growth produced by the method according to claim
 30. 39. Amethod for producing an epitaxial wafer by forming an epitaxial layer ona surface of the silicon wafer for epitaxial growth produced by themethod according to claim
 31. 40. A method for producing an epitaxialwafer by forming an epitaxial layer on a surface of a silicon wafer,comprising using a silicon wafer wherein the silicon wafer is producedby slicing a silicon single crystal grown according to the CZ methodwith doping nitrogen in the region where at least the center of thewafer becomes V region in which the void type defects are generated andwherein the number of the defects having an opening size of 20 nm orless among the void type defects appearing on a surface of the wafer is0.02/cm² or less.